/*============================================================================*/
/*                   CONTINENTAL AUTOMOTIVE SYSTEMS                           */
/*============================================================================*/
/*                        OBJECT SPECIFICATION                                */
/*============================================================================*
* name:            MALPIT_Init.c
* version:         1.1
* created_by:      Lizette Acosta/Rodrigo Casados
* date_created:    June 22 2013
*=============================================================================*/
/* DESCRIPTION : Initializes ports                                            */
/*============================================================================*/
/* FUNCTION COMMENT : Initializes IRQ vectors, PIT and disables Watchdog      */
/* application stuff.                                                         */
/*                                                                            */
/*============================================================================*/
/*  REVISION |   DATE      |                               |      AUTHOR      */
/*----------------------------------------------------------------------------*/
/*  1.1      | 22/June/2013 |                              | Lizette Acosta   */
/*                                                           Rodrigo Casados  */
/*============================================================================*/



/*============================================================================*/
/*                           initModesAndClock                                */
/*============================================================================*/
void initModesAndClock(void) {
  ME.MER.R = 0x0000001D;          /* Enable DRUN, RUN0, SAFE, RESET modes */
                                  /* Initialize PLL before turning it on: */
/* Use 1 of the next 2 lines depending on crystal frequency: */
  CGM.FMPLL_CR.R = 0x02400100;    /* 8 MHz xtal: Set PLL0 to 64 MHz */   
  
/*CGM.FMPLL_CR.R = 0x12400100;*/  /* 40 MHz xtal: Set PLL0 to 64 MHz */   
  ME.RUN[0].R = 0x001F0074;       /* RUN0 cfg: 16MHzIRCON,OSC0ON,PLL0ON,syclk=PLL */
  
  ME.RUNPC[1].R = 0x00000010; 	  /* Peri. Cfg. 1 settings: only run in RUN0 mode */
  ME.PCTL[92].R = 0x01;           /* PIT, RTI: select ME_RUN_PC[1] */	    	
                                  /* Mode Transition to enter RUN0 mode: */
  ME.MCTL.R = 0x40005AF0;         /* Enter RUN0 Mode & Key */
  ME.MCTL.R = 0x4000A50F;         /* Enter RUN0 Mode & Inverted Key */  
  while (ME.GS.B.S_MTRANS) {}     /* Wait for mode transition to complete */    
                                  /* Note: could wait here using timer and/or I_TC IRQ */
  while(ME.GS.B.S_CURRENTMODE != 4) {} /* Verify RUN0 is the current mode */
}



/*============================================================================*/
/*                           disableWatchdog                                  */
/*============================================================================*/
void disableWatchdog(void) {
  SWT.SR.R = 0x0000c520;     /* Write keys to clear soft lock bit */
  SWT.SR.R = 0x0000d928; 
  SWT.CR.R = 0x8000010A;     /* Clear watchdog enable (WEN) */
}        



/*============================================================================*/
/*                            initIrqVectors                                  */
/*============================================================================*/
asm void initIrqVectors(void) {
  lis	   r3, __IVPR_VALUE@h   /* IVPR value is passed from link file */
  ori      r3, r3, __IVPR_VALUE@l 
  mtivpr   r3									 
}



/*============================================================================*/
/*                              initINTC                                      */
/*============================================================================*/
void initINTC(void) {	
  INTC.MCR.B.HVEN = 0;       /* Single core: initialize for SW vector mode */
  INTC.MCR.B.VTES = 0;       /* Single core: Use default vector table 4B offsets */
  INTC.IACKR.R = (uint32_t) &IntcIsrVectorTable[0];    /* MPC555x: INTC ISR table base */
}



/*============================================================================*/
/*                                initPIT                                     */
/*============================================================================*/
void initPIT(void) {
                            /* NOTE:  DIVIDER FROM SYSCLK TO PIT ASSUMES DEFAULT DIVIDE BY 1 */
  PIT.PITMCR.R = 0x00000001;       /* Enable PIT and configure timers to stop in debug mode */
  PIT.CH[1].LDVAL.R = 64000;       /* PIT1 timeout = 64000 sysclks x 1sec/64M sysclks = 1 msec */
  PIT.CH[1].TCTRL.R = 0x000000003; /* Enable PIT1 interrupt and make PIT active to count */ 
  INTC.PSR[60].R = 0x01;           /* PIT 1 interrupt vector with priority 1 */
}



/*============================================================================*/
/*                              initSwIrq4                                    */
/*============================================================================*/
void initSwIrq4(void) {
  INTC.PSR[4].R = 2;		/* Software interrupt 4 IRQ priority = 2 */
}



/*============================================================================*/
/*                               enableIrq                                    */
/*============================================================================*/
void enableIrq(void) {
  INTC.CPR.B.PRI = 0;          /* Single Core: Lower INTC's current priority */
  asm(" wrteei 1");	    	   /* Enable external interrupts */
}